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VLSI Architectures for Programmable Sorting of Analog Quantities with Multiple-Chip Support.
Fabio Ancona
Giorgio Oddone
Stefano Rovetta
Gianni Uneddu
Rodolfo Zunino
Published in:
Great Lakes Symposium on VLSI (1997)
Keyphrases
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processor array
single chip
low cost
high speed
digital signal processors
vlsi implementation
signal processing
analog vlsi
vlsi design
circuit design
general purpose
vlsi architecture
mixed signal
cmos image sensor
low power
real time
database
multi channel
programmable logic