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Gate-level modelling and verification of asynchronous circuits using CSPM and FDR.

Mark B. Josephs
Published in: ASYNC (2007)
Keyphrases
  • asynchronous circuits
  • process algebra
  • delay insensitive
  • model checking
  • distributed systems
  • databases
  • real world
  • machine learning
  • case study
  • evolutionary algorithm
  • higher level
  • concurrent systems