Feedback Techniques for Dual-Rail Self-Timed Circuits.

Ronald F. DeMara Amit Kejriwal Jude Seeber

Published in: ESA/VLSI (2004)

Keyphrases

high speed
low power
logic circuits
relevance feedback
feedback loop
database
delay insensitive
learning algorithm
low cost
user feedback
circuit design
high bandwidth
cmos technology
shift register