Low power circuit techniques for optimizing power in high speed SRAMs.
Navneet Kaur SainiAniruddha GuptaRavija PrasharParul GuptaPublished in: ICACCI (2016)
Keyphrases
- low power
- high speed
- high power
- power dissipation
- power reduction
- power consumption
- logic circuits
- cmos technology
- energy dissipation
- low cost
- vlsi circuits
- wireless transmission
- gate array
- ultra low power
- single chip
- low power consumption
- vlsi architecture
- delay insensitive
- real time
- digital signal processing
- frame rate
- mixed signal
- energy efficiency
- general purpose
- computational power
- digital camera
- signal processing
- nm technology