A low-noise, low-power signal conditioning circuit with narrow bandwidth.
Parisa VejdaniFrederic NabkiPublished in: MWSCAS (2017)
Keyphrases
- low power
- high speed
- low signal to noise ratio
- energy dissipation
- wide dynamic range
- logic circuits
- low power consumption
- power consumption
- low cost
- cmos technology
- power reduction
- vlsi circuits
- high power
- power dissipation
- gate array
- delay insensitive
- noisy environments
- single chip
- mixed signal
- vlsi architecture
- impulse response
- signal to noise ratio
- real time
- digital signal processing
- image sensor
- frequency domain
- noise level
- high frequency
- power saving
- parallel processing
- sigma delta
- signal processing
- nm technology