A 14-bit 2.5 GS/s digital pre-distorted DAC in 65 nm CMOS with SFDR > 70 dB up to 1.2 GHz.
Zhiheng ZuoQingjun FanJinghong ChenPublished in: ISCAS (2017)
Keyphrases
- power consumption
- analog to digital converter
- clock gating
- metal oxide semiconductor
- high speed
- circuit design
- low cost
- low power
- nm technology
- cmos technology
- mixed signal
- random access memory
- image sensor
- cmos image sensor
- silicon on insulator
- integrated circuit
- constraint satisfaction problems
- x ray
- analog vlsi
- solid state
- dynamic range
- database