Design of a 60-GHz receiver front-end with broadband matching techniques in 65-nm CMOS.

Yuan Chai Lianming Li Tiejun Cui

Published in: IEICE Electron. Express (2018)

Keyphrases

high speed
low power
design process
low cost
circuit design
cmos technology
real time
pattern matching
design considerations
single chip
building blocks
power consumption
design methodology