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A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems.
Jongsun Kim
Bo-Cheng Lai
Mau-Chung Frank Chang
Ingrid Verbauwhede
Published in:
IEEE Trans. Computers (2008)
Keyphrases
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cost effective
multiprocessor systems
low cost
access patterns
distributed memory
cost effectiveness
prefetching
cache misses
data center
response time
multithreading
memory requirements
high speed
search engine
web logs
data mining
higher order