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Efficient Algorithm Adaptations and Fully Parallel Hardware Architecture of H.265/HEVC Intra Encoder.
Yuanzhi Zhang
Chao Lu
Published in:
IEEE Trans. Circuits Syst. Video Technol. (2019)
Keyphrases
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hardware architecture
computational complexity
np hard
hardware implementation
parallel implementation
real time
low complexity
video codec
block matching motion estimation
neural network
information systems
artificial neural networks
probabilistic model
motion estimation
fine grained