Enabling Reconfigurable HPC through MPI-based Inter-FPGA Communication.
Nicholas ContiniBharath RameshKaushik Kandadi SureshTu TranBenjamin MichalowiczMustafa AbduljabbarHari SubramoniDhabaleswar K. PandaPublished in: ICS (2023)
Keyphrases
- high performance computing
- field programmable gate array
- parallel computing
- hardware implementation
- systolic array
- low cost
- digital signal
- message passing interface
- massively parallel
- general purpose
- computing systems
- scientific computing
- embedded systems
- reconfigurable architecture
- data acquisition
- parallel algorithm
- reconfigurable hardware
- information sharing
- hardware software
- communication systems
- high speed
- parallel architecture
- parallel computation
- hardware design
- software implementation
- fault tolerance
- interconnection networks
- shared memory
- power reduction
- hardware software co design
- fault tolerant
- energy efficiency
- real time
- xilinx virtex
- fpga device
- grid computing
- efficient implementation
- parallel implementation
- multithreading
- computing resources
- parallel programming