Efficient Emulation of Floating-Point Arithmetic on Fixed-Point SIMD Processors.

Lukas Gerlach Guillermo Payá Vayá Holger Blume

Published in: SiPS (2016)

Keyphrases

fixed point
floating point
floating point arithmetic
instruction set
parallel algorithm
parallel architectures
parallel processing
sufficient conditions
dynamical systems
massively parallel
image processing
parallel computing
floating point unit
reinforcement learning
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