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Parallel architectures for the kNN classifier - design of soft IP cores and FPGA implementations.

Ioannis StamouliasElias S. Manolakos
Published in: ACM Trans. Embed. Comput. Syst. (2013)
Keyphrases
  • parallel architectures
  • hardware design
  • efficient implementation
  • real time
  • high speed
  • low cost
  • k nearest neighbor
  • hardware implementation
  • field programmable gate array
  • high end
  • knn classifier