A 1.8 V low-power CMOS high-speed four quadrant multiplier with rail-to-rail differential input.

Chi-Hung Lin Mohammed Ismail

Published in: ICECS (1998)

Keyphrases

high speed
low power
single chip
cmos technology
high power
vlsi architecture
low power consumption
wireless transmission
vlsi circuits
frame rate
logic circuits
image sensor
digital signal processing
real time
mixed signal
power consumption
focal plane
floating point
cmos image sensor
gate array