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Derivation and Formal Verification of a Mode Logic for Layered Control Systems.
Yuliya Prokhorova
Linas Laibinis
Elena Troubitsyna
Kimmo Varpaaniemi
Timo Latvala
Published in:
APSEC (2011)
Keyphrases
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formal verification
model checker
bounded model checking
control system
model checking
symbolic model checking
modal logic
automated verification
linear temporal logic
temporal logic
program slicing
fuzzy logic
multi valued
asynchronous circuits