A 30mW 10b 250MS/s dual channel SHA-less pipeline ADC in 0.18µm CMOS.
Xiaoke WenRui WangSiyu YangLei ChenJinghong ChenPublished in: MWSCAS (2012)
Keyphrases
- dual channel
- power consumption
- power supply
- hd video
- analog to digital converter
- low power
- high definition
- single chip
- high speed
- intelligent control
- image sensor
- pipeline architecture
- video transmission
- pac man
- cmos image sensor
- data sets
- low cost
- delay insensitive
- high frequency
- real time
- hash functions
- analog vlsi
- mass spectra
- multiple sclerosis
- power dissipation