A Reusable Hybrid RISC Processor with Programmable Instruction Set.

Hajer Najjar Riad Bourguiba Jaouhar Mouine

Published in: SSD (2018)

Keyphrases

instruction set
floating point
computer architecture
application specific
embedded systems
general purpose
low cost
ibm power processor
level parallelism
artificial intelligence
software systems
real time
fixed point
bit rate
data model
memory subsystem
floating point arithmetic