A Low-Noise Dynamic Comparator for Low-Power ADCs.

Yoshihiro Masui Kotaro Wada Akihiro Toya Masaki Tanioka

Published in: IEICE Trans. Electron. (2016)

Keyphrases

low power
power consumption
high speed
low cost
low power consumption
vlsi circuits
single chip
power reduction
energy dissipation
digital signal processing
noise level
logic circuits
signal to noise ratio
high power
cmos technology
vlsi architecture
signal processing
real time