Design and Calibration of a Small-Footprint, Low-Frequency, and Low-Power Gate Leakage Timer Using Differential Leakage Technique.
Yuya NishioAtsuki KobayashiKiichi NiitsuPublished in: IEICE Trans. Electron. (2019)
Keyphrases
- low power
- low frequency
- cmos technology
- high frequency
- power consumption
- single chip
- low cost
- low power consumption
- nm technology
- vlsi architecture
- high speed
- logic circuits
- digital signal processing
- power dissipation
- frequency domain
- gate array
- mixed signal
- wavelet transform
- design process
- vlsi circuits
- real time
- ultra low power
- image data
- multiscale
- image sensor
- frequency band
- wavelet coefficients
- image quality
- feature extraction