Hardware architecture design and implementation for FMCW radar signal processing algorithm.
Eugin HyunJonghun LeePublished in: DASIP (2014)
Keyphrases
- hardware architecture
- hardware implementation
- signal processing
- hardware architectures
- efficient implementation
- block matching motion estimation
- learning algorithm
- image processing
- computational complexity
- objective function
- design process
- probabilistic model
- field programmable gate array
- parallel implementation
- associative memory
- real time
- artificial neural networks
- multi agent
- feature extraction
- machine learning
- neural network