JOGM: A CMOS cell layout style using jogged transistor gates.

Ronald D. Hindmarsh

Published in: EURO-DAC (1993)

Keyphrases

high speed
low power
logic circuits
power dissipation
circuit design
inter cell
power consumption
metal oxide semiconductor
low cost
layout design
vlsi circuits
integrated circuit
cmos technology
immune response
image sensor
focal plane
cell formation
low voltage
power supply
neural network
real time