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Adaptive tile depth filter for the depth buffer bandwidth minimization in the low power graphics systems.
You-Ming Tsao
Chi-Ling Wu
Shao-Yi Chien
Liang-Gee Chen
Published in:
ISCAS (2006)
Keyphrases
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low power
power consumption
low cost
high speed
single chip
digital signal processing
vlsi architecture
high power
energy dissipation
vlsi circuits
deblocking filter