Noise and reliability in advanced CMOS devices for low power applications.
Purushothaman SrinivasanPublished in: SBCCI (2011)
Keyphrases
- low power
- power consumption
- high speed
- low power consumption
- low cost
- single chip
- cmos technology
- image sensor
- vlsi circuits
- high power
- ultra low power
- mobile devices
- delay insensitive
- energy dissipation
- digital signal processing
- logic circuits
- signal to noise ratio
- power dissipation
- vlsi architecture
- noise model
- embedded systems
- wireless transmission
- wide dynamic range
- real time
- signal processing
- signal processor
- nm technology