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23.8 A 1V 7.8mW 15.6Gb/s C-PHY transceiver using tri-level signaling for post-LPDDR4.

Woojun ChoiTaewoong KimJongjoo ShimHyungsoo KimGunhee HanYoungcheol Chae
Published in: ISSCC (2017)
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