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A 10-bit 300-MS/s asynchronous SAR ADC with strategy of optimizing settling time for capacitive DAC in 65 nm CMOS.
Yuhua Liang
Zhangming Zhu
Ruixue Ding
Published in:
Microelectron. J. (2015)
Keyphrases
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analog to digital converter
delay insensitive
low cost
synthetic aperture radar
nm technology
high speed
sar images
power consumption
cmos technology
silicon on insulator
image processing
shift register