Sign in
Probabilistic Modeling during Power Estimation for Mixed Polarity Reed-Muller Logic Circuits.
Xiang Wang
Ying Lu
Yi Zhang
Zexi Zhao
Tongsheng Xia
Jishun Cui
Limin Xiao
Published in:
GreenCom/iThings/CPScom (2013)
Keyphrases
</>
probabilistic modeling
logic circuits
low power
power consumption
probabilistic model
power dissipation
functional decomposition
bayesian inference
bayesian networks
gate array
sentiment analysis
logic synthesis
computer vision
high speed
parameter estimation