Clock-Aware FPGA Placement Contest.
Stephen YangChandra MulpuriSainath ReddyMeghraj KalaseSrinivasan DasasathyanMehrdad E. DehkordiMarvin TomRajat AggarwalPublished in: ISPD (2017)
Keyphrases
- high speed
- fpga device
- real time image processing
- field programmable gate array
- hardware implementation
- low cost
- power consumption
- real time
- hardware design
- pattern recognition
- verilog hdl
- systolic array
- hardware architectures
- low power
- signal processing
- machine learning
- neural network
- data sets
- computer systems
- massively parallel
- data structure
- image processing
- digital signal
- search engine