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Adiabatic Logic Based Low-Power Precomputation-Based Content Addressable Memory Parameter Extractor Design.
Chi-Chia Sun
Cheng Chih Wang
Published in:
J. Low Power Electron. (2018)
Keyphrases
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low power
power consumption
high speed
single chip
low power consumption
vlsi architecture
logic circuits
low cost
gate array
power dissipation
cmos technology
design process
digital signal processing
vlsi circuits
mixed signal
high power
efficient implementation
power reduction
ultra low power