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A 10-Gb/s 20-ps Delay-Range Digitally Controlled Differential Delay Element in 45-nm SOI CMOS.
Sami Ur Rehman
Mohammad Mahdi Khafaji
Corrado Carta
Frank Ellinger
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2019)
Keyphrases
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wide range
high speed
silicon on insulator
critical path
database
power consumption
real time
genetic algorithm
x ray
low power
power dissipation
cmos technology
vlsi circuits