FPGA-based Acceleration of Binary Neural Network Training with Minimized Off-Chip Memory Access.
Pavan Kumar ChundiPeiye LiuSangsu ParkSeho LeeMingoo SeokPublished in: ISLPED (2019)
Keyphrases
- memory access
- neural network training
- data access
- training algorithm
- memory management
- main memory
- neural network
- shared memory
- hardware implementation
- external memory
- processing units
- optimization method
- access patterns
- high volume
- data management
- application specific
- data storage
- training process
- back propagation
- training set
- data structure
- database systems
- machine learning
- real time
- operating system
- decision trees
- particle swarm optimisation
- databases