A New VLSI Architecture of a Hierarchical Motion Estimator for Low Bit-Rate Video Coding.

Jae Hun Lee Sung Deuk Kim Sung Kyu Jang Jong Beom Ra

Published in: ICIP (2) (1999)

Keyphrases

vlsi architecture
motion estimation algorithm
motion estimation
motion compensation
motion vectors
motion field
block matching
image processing
video sequences
accurate estimation
image sequences
video coding
flow field
motion compensated
low bit rate