Hardware implementation and validation of the fast variable block size motion estimation architecture for HEVC Standard.
Hassen LoukilAbdulilah Mohammad MayetPublished in: Multim. Tools Appl. (2023)
Keyphrases
- hardware implementation
- parallel architecture
- software implementation
- dedicated hardware
- variable block size motion estimation
- fpga implementation
- signal processing
- efficient implementation
- hardware design
- hardware architecture
- fpga technology
- pipeline architecture
- field programmable gate array
- pattern recognition
- general purpose processors
- pipelined architecture
- image processing algorithms
- real time
- general purpose
- multiresolution
- data streams
- fpga device
- image processing
- computer vision
- machine learning