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Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool.
Luciano Lavagno
Patrick C. McGeer
Alexander Saldanha
Alberto L. Sangiovanni-Vincentelli
Published in:
DAC (1995)
Keyphrases
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logic synthesis
design process
design tools
user interface
building blocks
chip design
peer to peer overlay
efficient implementation
power dissipation
software engineering
software architecture
power consumption
design principles
design space
analog circuits
assessment tool