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Implementation of the AES-128 on Virtex-5 FPGAs.
Philippe Bulens
François-Xavier Standaert
Jean-Jacques Quisquater
Pascal Pellegrin
Gaël Rouvroy
Published in:
AFRICACRYPT (2008)
Keyphrases
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hardware implementation
reconfigurable hardware
low cost
field programmable gate array
efficient implementation
fine grain
fpga implementation
hardware software
data sets
pattern recognition
parallel implementation
design methodology
secret key
hardware design
fpga device