A fanout-improved Parallel Prefix Adder with full-swing PTL cells and Graded Bit Efficiency.

M. Rahimi M. B. Ghaznavi-Ghoushchi

Published in: Microelectron. J. (2021)

Keyphrases

bit parallel
pattern matching
regular expressions
propositional logic
belief revision
parallel processing
data structure
computational efficiency
shared memory
knowledge base
high efficiency