Using Model Checking to Analyze Network Vulnerabilities.
Ronald W. RitcheyPaul AmmannPublished in: IEEE Symposium on Security and Privacy (2000)
Keyphrases
- model checking
- temporal logic
- finite state machines
- automated verification
- formal specification
- finite state
- temporal properties
- formal verification
- model checker
- partial order reduction
- reachability analysis
- computation tree logic
- bounded model checking
- epistemic logic
- timed automata
- verification method
- symbolic model checking
- formal methods
- pspace complete
- concurrent systems
- transition systems
- reactive systems
- modal logic
- process algebra
- linear temporal logic
- distributed systems
- asynchronous circuits
- alternating time temporal logic