Design of power-efficient class-D CMOS power amplifier with resistor feedback.

Gyu-Sup Won Dong-Soo Lee SungHun Cho Kang-Yoon Lee

Published in: ISOCC (2017)

Keyphrases

power consumption
high power
low power
power dissipation
chip design
case study
building blocks
power management
ultra low power
data sets
electrical power
cmos technology
digital signal processing
single chip
design methodology
user experience
design process
high speed
user interface