Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors.
Mirko LoghiMartin LetisLuca BeniniMassimo PoncinoPublished in: ACM Great Lakes Symposium on VLSI (2005)
Keyphrases
- energy efficiency
- single chip
- power consumption
- low power
- embedded processors
- signal processor
- high performance computing
- highly parallel
- energy consumption
- packet delivery
- energy efficient
- wireless sensor networks
- sensor networks
- data center
- low cost
- routing protocol
- response time
- image sensor
- smart home
- parallel algorithm
- parallel processing
- signal processing
- high speed
- denoising
- data sets