Low-power CMOS LC QVCO using zero-biased transistor coupling of MWCNT network-based VCO structure.
B. S. SreejaPublished in: Microelectron. J. (2014)
Keyphrases
- hardware implementation
- low power
- power consumption
- high speed
- low cost
- single chip
- digital signal processing
- power dissipation
- wireless transmission
- high power
- vlsi circuits
- delay insensitive
- gate array
- cmos technology
- vlsi architecture
- image sensor
- logic circuits
- low power consumption
- nm technology
- power saving
- mixed signal
- power management
- hardware and software