Media processor core architecture for realtime, bi-directional MPEG4/H.26X codec with 30 fr/s for CIF-video.
T. KamemaruHideo OhiraH. SuzukiK. AsanoMasahiko YoshimotoTokumichi MurakamiPublished in: CICC (2000)
Keyphrases
- bi directional
- video decoder
- multimedia
- real time
- low power consumption
- video codec
- digital video
- bitstream
- associative memory
- low cost
- video sequences
- video coding
- compressed video
- processor core
- compression standards
- video data
- motion jpeg
- multimedia data
- embedded systems
- digital television
- inter frame
- coding scheme
- transform domain
- wyner ziv
- motion estimation
- video signals
- video streams
- ibm zenterprise
- management system
- audio visual content
- video quality
- multimedia content
- distributed video coding
- key frames
- rate distortion