A 32 bit 15M flop floating point programmable signal processor architecture for VLSI implementation.

James H. Hesson

Published in: ICASSP (1985)

Keyphrases

floating point
signal processor
vlsi implementation
vlsi architecture
low power
signal processing
single chip
instruction set
floating point arithmetic
fixed point
low cost
power consumption
filter bank
high speed
fir filters
associative memory
image enhancement
computer vision
high quality
image processing