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Fast Modular Arithmetic on the Kalray MPPA-256 Processor for an Energy-Efficient Implementation of ECM.
Masahiro Ishii
Jérémie Detrey
Pierrick Gaudry
Atsuo Inomata
Kazutoshi Fujikawa
Published in:
IEEE Trans. Computers (2017)
Keyphrases
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instruction set
high speed
efficient implementation
data sets
wireless sensor networks
computer architecture
highly parallel
computation intensive
neural network
parallel processing
graphics processing units
modular architecture
modular structure