Optimization of throughput performance for low-power VLSI interconnects.
Vinita V. DeodharJeffrey A. DavisPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2005)
Keyphrases
- low power
- power dissipation
- high speed
- power consumption
- single chip
- vlsi circuits
- low cost
- gate array
- cmos technology
- vlsi architecture
- energy dissipation
- high power
- low power consumption
- digital signal processing
- logic circuits
- mixed signal
- response time
- power reduction
- real time
- wireless transmission
- energy efficiency
- nm technology