Low power high speed I/O interfaces in 0.18 μm CMOS.
Ying YanTed H. SzymanskiPublished in: ICECS (2003)
Keyphrases
- low power
- high speed
- gigabit ethernet
- single chip
- power consumption
- high power
- frame rate
- low cost
- image sensor
- vlsi circuits
- digital signal processing
- cmos technology
- real time
- logic circuits
- mixed signal
- focal plane
- low power consumption
- gate array
- ultra low power
- vlsi architecture
- wireless transmission
- power reduction
- delay insensitive
- file system
- cmos image sensor
- operating system
- nm technology