High gain, low power, CMOS current reused LNA with noise optimization.
Mohammad RezvaniShahab ArdalanKaamran RaahemifarPublished in: CCECE (2013)
Keyphrases
- low complexity
- low power
- power consumption
- high speed
- low cost
- vlsi architecture
- low power consumption
- single chip
- vlsi circuits
- image sensor
- wireless transmission
- high power
- wide dynamic range
- logic circuits
- digital signal processing
- energy dissipation
- cmos technology
- cmos image sensor
- real time
- noise model
- nm technology
- noise level
- gate array
- power dissipation
- delay insensitive
- gaussian noise
- image processing