3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS.
Karthik GopalakrishnanAlan RenAmber TanArash FarhoodArun TiruvurBelal HelalChang-Feng LoiChris JiangHalil CiritIrene QuekJamal RianiJames GoreckiJennifer WuJorge PernilloLawrence TseMichael Q. LeMohammad RanjbarPui-Shan WongPulkit KhandelwalRajesh NarayananRavindran MohanaveluSameer HerlekarSudeep BhojaVlad ShvydunPublished in: ISSCC (2016)
Keyphrases
- high speed
- low power
- ultra low power
- cmos technology
- nm technology
- silicon on insulator
- metal oxide semiconductor
- real time
- ultra wide band
- low cost
- frequency response
- focal plane
- tcp ip
- data acquisition
- low voltage
- image sensor
- ultra wideband
- delay insensitive
- analog vlsi
- vlsi circuits
- power consumption
- single chip
- power supply
- computer simulation
- phase locked loop