A Hybrid CAVLD Architecture Design with Low Complexity and Low Power Considerations.

Tsung-Han Tsai De-Lung Fang Yu-Nan Pan

Published in: ICME (2007)

Keyphrases

low complexity
low power
vlsi architecture
low cost
high speed
power consumption
computational complexity
motion estimation
bit plane
logic circuits
cmos technology
mixed signal
multiple description coding
real time
distributed video coding
ultra low power