Configuration Compression for the Xilinx XC6200 FPGA.
Scott HauckZhiyuan LiEric J. SchwabePublished in: FCCM (1998)
Keyphrases
- field programmable gate array
- hardware implementation
- xilinx virtex
- hardware architecture
- high speed
- fpga implementation
- pipelined architecture
- fpga device
- data compression
- parallel computing
- dedicated hardware
- image compression
- embedded systems
- hardware design
- efficient implementation
- real time
- hardware description language
- image processing algorithms
- computing systems
- compression scheme
- compression ratio
- programmable logic
- compression algorithm
- lossless compression
- fpga technology
- hardware architectures
- software implementation
- hyperspectral image compression
- optimal configuration
- real time image processing
- lossy compression
- hardware software
- reconfigurable hardware
- single chip
- configuration space
- compression rate
- signal processing
- computational complexity