High performance and cost effective memory architecture for an HDTV decoder LSI.

Tetsuro Takizawa Junji Tajime Hidenobu Harasaki

Published in: ICASSP (1999)

Keyphrases

cost effective
low cost
data flow
associative memory
management system
cost effectiveness
fpga implementation
real time
data center
processing elements
memory requirements
level parallelism
memory hierarchy
latent semantic indexing
video conferencing
main memory
computational intelligence
information retrieval