Dataflow Aware Mapping of Convolutional Neural Networks Onto Many-Core Platforms With Network-on-Chip Interconnect.
Andreas BytynRené AhlsdorfRainer LeupersGerd AscheidPublished in: CoRR (2020)
Keyphrases
- convolutional neural networks
- network on chip
- power dissipation
- convolutional network
- interconnection networks
- routing algorithm
- high speed
- design methodology
- data flow
- data transfer
- digital signal processing
- network simulator
- multi processor
- image processing
- parallel computing
- ad hoc networks
- fault tolerant
- parallel algorithm
- dynamic programming