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A Verilog Piecewise-Linear Analog Behavior Model for Mixed-Signal Validation.

Sabrina LiaoMark Horowitz
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2014)
Keyphrases
  • piecewise linear
  • data sets
  • decision trees
  • signal processing
  • input data
  • vlsi circuits